Fig. 4

a Schematic of the nanoscale memristor device used as synapse. The insets illustrate the two-terminal device geometry and the layered structure of the memristor. b Measured (blue lines) and calculated (orange lines) I − V curves for sequential voltage sweeps, demonstrating memristive behaviour. The insert shows the calculated (orange lines) and extracted (blue lines) values of the normalised Ag front position w during positive DC sweeps. c Demonstration of STDP. The plot shows the measured change of the memristor synaptic weight (normalised to the maximum synaptic weight) as a function of the relative timing ∆t of the neuron spikes. Reproduced from ref. [13] with permission